7 #define CMD_MODE 0x80 //mode(bit2-0) 000:PIO 001:FIFO 010:GPIF
12 #define MODE_FIFO 0x01
13 #define MODE_GPIF 0x02
14 #define MODE_8BIT 0x00
15 #define MODE_16BIT 0x08
16 #define MODE_ADDR 0x10
17 #define MODE_NOADDR 0x00
18 #define MODE_FLOW 0x20
19 #define MODE_NOFLOW 0x00
20 #define MODE_DEBG 0x40
21 #define MODE_NODEBG 0x00
23 #define CMD_GPIF 0x81 //IFCONFIG(1)+RDYCTL(7)=8byte
24 #define CMD_WAVE 0x82 //WAVE(32*4)=128byte
25 #define CMD_FLOW 0x83 //FLOW(9*4)=36byte
26 #define CMD_WAVE0 0x84 //WAVE 32byte
27 #define CMD_WAVE1 0x85 //WAVE 32byte
28 #define CMD_WAVE2 0x86 //WAVE 32byte
29 #define CMD_WAVE3 0x87 //WAVE 32byte
30 #define CMD_WFSEL 0x88 //bit1-0:FIFORD, bit3-2:FIFOWR, bit5-4:SINGLERD, bit7-6:SINGLEWR
31 #define CMD_ADSET 0x89 //byte0:GPIFADRL, byte1:GPIFADRH
32 #define CMD_CPUCS 0x8a //SPEED(bit4-3) 00:12MHz 01:24MHz 10:48MHz , CLKOE(bit1) 0:no 1:out
33 #define CMD_USBCS 0x8b //return 1byte(bit7 1:HI-Speed(480M) 0:Full-Speed(12M))
34 #define CMD_SREAD 0x90 //return (8bit mode:1byte data, 16bit mode:2byte data(H -> L))
35 #define CMD_SWRITE 0x91 //8bit mode:1byte data, 16bit mode:2byte data(H -> L)
36 #define CMD_BREAD 0x92 //byte0:words(Low), byte1:words(Hi)
37 #define CMD_BWRITE 0x93 //byte0:words(Low), byte1:Words(Hi)
38 #define CMD_OEA 0x00 //bitx 0:input 1:output
39 #define CMD_OEB 0x01 //bitx 0:input 1:output
40 #define CMD_OEC 0x02 //bitx 0:input 1:output
41 #define CMD_OED 0x03 //bitx 0:input 1:output
42 #define CMD_OEE 0x04 //bitx 0:input 1:output
43 #define CMD_INA 0x05 //return port
44 #define CMD_INB 0x06 //return port
45 #define CMD_INC 0x07 //return port
46 #define CMD_IND 0x08 //return port
47 #define CMD_INE 0x09 //return port
48 #define CMD_OUTA 0x0a //output port
49 #define CMD_OUTB 0x0b //output port
50 #define CMD_OUTC 0x0c //output port
51 #define CMD_OUTD 0x0d //output port
52 #define CMD_OUTE 0x0e //output port
53 #define CMD_WAIT 0x0f //wait (byte0)ms
54 #define CMD_NOP 0x10 //wait (byte0)cycles
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